Description
Dell R410 Server Motherboard Overview
The introduction of the new Intel Xeon processor 5600 series includes a stepping revision of the Intel 5520 and 5500 chipset, which is required to enable the full 5600 series feature set. Dell servers shipped with the new chipset revision have the symbol II in the System Revision Field visible through Open Manage Server Administrator (OMSA) and the iDRAC GUI. They are physically marked with a 12 x 6mm rectangular label containing the symbol II. The memory interface is optimized for 800/1066/1333 MHz DDR3 SDRAM memory with ECC when running with Intel Xeon processor 5600 series.
Intel 5500 Chipset Features
The following high-level features are supported by the Intel 5500 chipset:
• Package: FCBGA9
• Intel QuickPath interconnect: 2 ports
• ESI interface: x4 lanes
• Virtualization technology
• 24 PCIe Gen2 lanes
• Integrated Management Engine
• JTAG support
Intel QuickPath Interconnect
Intel QuickPath Interconnect features include:
• Point-to-point cache-coherent interconnect
• Fast/narrow unidirectional links
• Concurrent bi-directional traffic
• Error detection via CRC
• Errors correction via Link level retry
• Intel Interconnect BIST (Intel IBIST) toolbox built-in
• Packet-based protocol
Dell PowerEdge R410 Motherboard Memory Interface
System memory interface features include:
• Memory controller integrated into the CPU package
• 3 channels per processor (6 total)
• Three DIMMs/channels supported (18 total)
• Max memory of 192-GB supported
• Single Rank, Dual Rank, and Quad Rank DIMMs supported
• Support UDIMM and RDIMM
• DDR3 speeds of 800/1066/1333 support
• 512 Mb, 1 Gb, 2 Gb, and 4 Gb Technologies/Densities supported
• No memory riser support.
PCI Express Interfaces
PCI Express Interfaces include:
• Intel 5500 chipset IOH provides multiple PCI Express* Gen 2 interfaces
• Point-to-point, serial bi-directional interconnect
• One x4 ESI link to ICH10
• Up to six x4 PCI Express Gen 2 ports
• x4 link pairs can be combined to form x8 links and or x16 links
• Each signal is 8b/10b encoded with an embedded clock
• Signaling bit rate of 5Gbit/sec/lane/direction; for an x4 link. bandwidth is 2 GB/sec in each direction.
• Hot Insertion and Removal supported with the addition of Hot-Plug control circuitry.
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